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Softname: |
Cadence.ASSURA.V3.2 | ||
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Information | ||
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Cadence.ASSURA.V3.17
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Size: |
8CD |
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| Language: | English | ||
| Protection: | Flexlm | ||
| Date: | 2008.10.29 | ||
| Software Type: | EDA | ||
| Platform: |
Linux |
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| Release Type: | License | ||
| Introduce | URL: | http://www.cadence.com | |
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Cadence® Assura® Physical Verification supports both interactive and batch operation modes with a single set of design rules. It uses hierarchical processing and multi-processing for fast, efficient identification and correction of design rule errors. Unique pattern-checking capabilities enable simple rule development and maintenance for hard-to-write rules. Assura Physical Verification incorporates advanced sub-65nm process parameter measurement, nanometer design rules for DFM, and process design rule checks. Assura Physical Verification reduces overall verification time because it incorporates a fast and intuitive debug capability integrated within the Virtuoso® custom design environment. It facilitates schematic-to-layout cross-probing and incorporates technologies that fix, extract, and compare errors. An interactive short locator accelerates recognition and fixing of shorts. Assura Physical Verification also offers plug-and-play integration with transistor-based Cadence QRC Extraction technology. Features/Benefits
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http://www.caxsoft.net/
http://softworld.tux.nu |
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