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Mentor.Graphics.PADS.v2007.3

Size:

817M

Language: English
Protection: Flexlm
       Date: 2009.05.20
Software Type:  EDA
Platform:

  Windows

Release Type: License
Introduce   URL: http://www.mentor.com/pads

Mentor Releases PADS 9.0
 Think you know PADS? Attend this webinar and see how PADS, the most widely used desktop PCB layout system, provides much more than ever before in PADS v9.0.

PADS still offers easy-to-use and powerful design capture and PCB design functionality, but now PADS' capabilities have been extended to include best-in-class tools for pre- and post- layout simulation, power integrity, thermal analysis, collaboration, and better ties to manufacturing.

Come see how a PADS solution can ensure first-time success of your design, and make you and your team more productive.



Reported PADS 9.0 enhancements include:

-   High-speed routing improvements ? Controls for matched length nets and differential routing improvements.

-   Square and chamfered corners, DXF-in import and via matrixing enhancements for RF design.

-   Blind/buried via drill table improvements ? Designs with partial vias (blind or buried) are automatically updated with the layer pairs and drill count of the partial vias in the design.

-   Alphanumeric pin improvements ? Simplifies creation of large BGA-based parts.

-   ECO enhancements ? Includes comparison of design rules between the schematic and layout databases.

-   Design for fabrication (DFF) analysis ? Powerful fabrication checks, such as acid trap, starved thermals, solder mask slivers are checked in the CAD environment and database, allowing the designer to identify and correct manufacturing problems in PADS Layout, before Gerber generation.

-   Pin number visibility ? The user has the ability to turn on/off the visibility of the component pin numbers, either numeric or alphanumeric, improving designer productivity during routing.

-   SI analysis ? Integration of DxDesigner and the HyperLynx LineSim tool through a new interface allows fast transfer of a circuit for analysis and back annotation of termination resistor values.

-   Analog simulation - Provides a board level simulation analysis and verification through a common schematic editor for both simulation and PCB design entry.

"Mentor Graphics continues to invest in the future of PADS by strengthening the capabilities of designers to integrate RF circuitry design, high-speed net analysis and routing, and DFF into the PADS design flow," said Dan Boncella, director of marketing, System Design Division, Mentor Graphics.

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